I/O basics: memory-mapped I/O and polling

A computer that only did calculations would be useless: it has to get data from somewhere and give the result somewhere. The input and output parts of the von Neumann model do this job. On this page you will learn how the LC-3 talks to the keyboard and the display. The mechanism is simple: the device has two registers, one holds the answer to the question “are you ready?”, the other holds the character itself.

This topic uses the LC-3 instructions of weeks 7-8 (LDI, STI, BR). If you have not seen those instructions yet, reread this page after them; here we explain what each instruction does in a single sentence.

Device registers

Every I/O device has at least two registers:

• Data register: the data transferred (the character).
• Status register: the state of the device, especially the “ready” information.

The registers of the keyboard and display in the LC-3:

Memory-mapped I/O

Some processors have special instructions for I/O (like IN, OUT). The LC-3 does not do this: the device registers are given memory addresses. The processor accesses them with ordinary load and store instructions like memory. When the memory interface sees that the address is in the xFE00 region, it routes the request to the device, not to memory. This is called memory-mapped I/O.

The result: “read from the keyboard” = “read address xFE02”. “Write to the screen” = “write to address xFE06”.

Why LDI and STI?

The LD and ST instructions can access an address near the PC: PC + offset, with a 9-bit offset, that is -256..+255. The program is around x3000. xFE00 is too far. The solution: put the device’s address next to the program as a pointer and access it indirectly.

KBSRP   .FILL xFE00     ; the address of KBSR, inside the program
...
        LDI  R1, KBSRP  ; R1 ← M[M[KBSRP]] = M[xFE00] = KBSR

LDI R1, KBSRP reads in two steps: first it takes the value in KBSRP (xFE00), then it puts the contents of that address in R1. STI does the same for writing.

Synchronization: the ready bit

The keyboard is asynchronous: it is not known when the user will press a key. The processor, meanwhile, executes billions of instructions per second. For the two to work together a handshake is needed. The ready bit provides it.

Keyboard side:

1. The user presses a key. The keyboard puts the ASCII code in KBDR and sets KBSR[15] = 1.
2. The processor reads KBDR. At the moment of reading, KBSR[15] automatically becomes 0.
3. While KBSR[15] = 0, the keyboard does not write a new character to KBDR; this way an unread character is not overwritten.

Display side:

1. If DSR[15] = 1, the display is ready.
2. The processor writes the character to DDR. DSR[15] becomes 0.
3. After the display has shown the character, DSR[15] becomes 1.

TIP · Why BRzp? The ready bit is bit 15, that is, the sign bit of the 16-bit number. When ready, the value loaded into the register is negative (N). When not ready it is 0 or positive (Z or P). “Wait as long as it is not ready” = loop back with BRzp.

Polling

The processor reading the ready bit again and again in a loop is called polling.

Read a character from the keyboard:

POLL    LDI  R1, KBSRP   ; R1 ← KBSR
        BRzp POLL        ; bit 15 = 0 → not ready, ask again
        LDI  R0, KBDRP   ; R0 ← KBDR (the character)

Write a character to the screen:

POLL2   LDI  R1, DSRP    ; R1 ← DSR
        BRzp POLL2       ; the display is busy, wait
        STI  R0, DDRP    ; DDR ← R0

Worked example: echo

Read a character from the keyboard and write it to the screen.

        .ORIG x3000
START   LDI  R1, KBSRP
        BRzp START
        LDI  R0, KBDRP
ECHO    LDI  R1, DSRP
        BRzp ECHO
        STI  R0, DDRP
        HALT
KBSRP   .FILL xFE00
KBDRP   .FILL xFE02
DSRP    .FILL xFE04
DDRP    .FILL xFE06
        .END

When the user types k:

k

When the program ends, R0 = x006B (the ASCII code of ‘k’), R1 = x8000 (the last DSR read, ready), condition code N.

The difference between polling and interrupts

A person presses perhaps 5 keys per second, and in that time the processor can execute billions of instructions. Polling wastes almost all of this time. With interrupts, the processor does its own work, a short service routine runs when the device is ready, and the processor returns to where it left off.

TRAP: leave it to the operating system

Writing these polling loops in every program is both tedious and dangerous (you do not want a user program to play with the device registers). In the LC-3, this job is left to service routines in the operating system. The user program calls them with the TRAP instruction.

When TRAP x23 runs:

1. The return address is saved: R7 ← PC (the already incremented PC).
2. PC ← M[x0023]. The range x0000-x00FF is the trap vector table; each row holds the starting address of a service routine.
3. The service routine does its job with its own polling loop.
4. At the end it returns to the user program with RET (= JMP R7).

Worked example: read a digit from the keyboard and print its double.

        GETC                ; R0 ← '3' = x33
        LD   R1, NEG30      ; R1 ← -48
        ADD  R2, R0, R1     ; R2 ← 3 (the number)
        ADD  R0, R2, R2     ; R0 ← 6
        LD   R1, POS30      ; R1 ← 48
        ADD  R0, R0, R1     ; R0 ← '6'
        OUT
        HALT
NEG30   .FILL #-48
POS30   .FILL #48

If the user types 3:

6

PITFALL · overwriting R7. TRAP writes the return address into R7. If your program keeps an important value in R7, it is lost after a TRAP. Save it somewhere else first.

Common mistakes

        AND  R2, R2, #0
        ADD  R2, R2, #2
AGAIN   LDI  R1, KBSRP
        BRzp AGAIN
        LDI  R0, KBDRP
        ADD  R0, R0, #1
WAIT    LDI  R1, DSRP
        BRzp WAIT
        STI  R0, DDRP
        ADD  R2, R2, #-1
        BRp  AGAIN
        HALT